July 20, 2026
Thermal Design Power: What the Datasheet Doesn’t Tell You
TDP is a design target for the cooling system, not a hard ceiling on what the chip can draw. Sustained real-world workloads…
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Ingot to package
A 300mm cylinder of ultra-pure single-crystal silicon, grown by slowly pulling a seed crystal from a molten melt.
The ingot is wire-sawn into wafers a fraction of a millimetre thick, then polished to a mirror finish flat to a few atoms.
A mask pattern is projected onto photoresist across the wafer — EUV light for the finest layers, deep-UV for the rest.
Reactive plasma carves the exposed pattern into the wafer surface, layer by layer, hundreds of times per die.
Ion implantation embeds precise dopant atoms to define where each transistor turns on and off.
Dies are diced, bonded to a substrate, wired or bumped, and sealed under a lid built for the thermal load.
Every part is electrically tested and binned before it ever reaches a customer — nothing untested ships.
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One roof, six nodes
We run mature and frontier nodes side by side on purpose — most customers need one boring, reliable part and one that pushes density, not two different vendors.
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From the journal
July 20, 2026
TDP is a design target for the cooling system, not a hard ceiling on what the chip can draw. Sustained real-world workloads…
Read →July 20, 2026
Transistor density gains are slowing and getting more expensive per generation. Increasingly, the performance win is coming from how the dies are…
Read →July 20, 2026
A respin is not "fix the bug and resubmit." It is a new mask set, a new wafer lot, and — if…
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