The Real Cost of a Chip Respin

“We’ll just respin it” is the sentence that turns a six-figure mistake into a seven-figure one, and it’s worth walking through why, because the cost almost never shows up where people expect.

The mask set itself is real money — a full layer set for a modern node runs well into seven figures — but it’s rarely the dominant cost. The dominant cost is calendar time: a respin means a new wafer lot goes through the entire fab flow again, which on a mature node is measured in weeks, and on a frontier node with a long implant and anneal sequence can be measured in months. During that entire window, whatever product depended on this chip does not ship.

The cost that catches customers off guard is downstream requalification. If the bug was cosmetic — a documentation error, a register default that software can work around — the fix might only need functional reverification. But if it touches anything safety-relevant, or anything in a regulated device, the customer’s own certification body may require the whole qualification suite to run again on the new silicon. We saw this directly on the Slate program: a mixed-signal ASIC for an implantable medical device where any silicon change, however small, would have restarted a multi-year regulatory clock. That is the actual reason some of our customers pay a premium to stay on a boring, well-characterised node forever — the die cost is irrelevant next to the cost of ever touching it again.

Our own respin rate across the last three years sits under 4% of tapeouts, and the overwhelming majority of those were caught in post-silicon validation before a single unit reached a customer.